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Preface
Aims
This book introduces the concepts and methodologies employed in designing a
system-on-chip (SoC) based around a microprocessor core and in designing the
microprocessor core itself. The principles of microprocessor design are made concrete by extensive illustrations based upon the ARM.
The aim of the book is to assist the reader in understanding how SoCs and microprocessors are designed and used, and why a modern processor is designed the way
that it is. The reader who wishes to know only the general principles should find that
the ARM illustrations add substance to issues which can otherwise appear somewhat
ethereal; the reader who wishes to understand the design of the ARM should find that
the general principles illuminate the rationale for the ARM being as it is.
Other microprocessor architectures are not described in this book. The reader who
wishes to make a comparative study of architectures will find the required information on the ARM here but must look elsewhere for information on other designs.
Audience
The book is intended to be of use to two distinct groups of readers:
• Professional hardware and software engineers who are tasked with designing an
SoC product which incorporates an ARM processor, or who are evaluating the
ARM for a product, should find the book helpful in their duties. Although there
is considerable overlap with ARM technical publications, this book provides a
broader context with more background. It is not a substitute for the manufac
turer's data, since much detail has had to be omitted, but it should be useful as an
introductory overview and adjunct to that data.
• Students of computer science, computer engineering and electrical engineering
should find the material of value at several stages in their courses. Some chapters
are closely based on course material previously used in undergraduate teaching;
some other material is drawn from a postgraduate course.
Prerequisite
knowledge
This book is not intended to be an introductory text on computer architecture or
computer logic design. Readers are assumed to have a level of familiarity with these
subjects equivalent to that of a second year undergraduate student in computer science or computer engineering. Some first year material is presented, but this is more
by way of a refresher than as a first introduction to this material. No prior
familiarity with the ARM processor is assumed.
The ARM
On 26 April 1985, the first ARM prototypes arrived at Acorn Computers Limited in
Cambridge, England, having been fabricated by VLSI Technology, Inc., in San Jose,
iv
Preface
California. A few hours later they were running code, and a bottle of Moet &
Chan-don was opened in celebration. For the remainder of the 1980s the ARM was
quietly developed to underpin Acorn's desktop products which form the basis of
educational computing in the UK; over the 1990s, in the care of ARM Limited, the
ARM has sprung onto the world stage and has established a market-leading position
in high-performance low-power and low-cost embedded applications.
This prominent market position has increased ARM's resources and accelerated the
rate at which new ARM-based developments appear.
The highlights of the last decade of ARM development include:
• the introduction of the novel compressed instruction format called 'Thumb'
which reduces cost and power dissipation in small systems;
• significant steps upwards in performance with the ARM9, ARM 10 and 'StrongARM' processor families;
• a state-of-the-art software development and debugging environment;
• a very wide range of embedded applications based around ARM processor cores.
Most of the principles of modern SoC and processor design are illustrated somewhere in the ARM family, and ARM has led the way in the introduction of some concepts (such as dynamically decompressing the instruction stream). The inherent
simplicity of the basic 3-stage pipeline ARM core makes it a good pedagogical introductory example to real processor design, whereas the debugging of a system based
around an ARM core deeply embedded into a complex system chip represents the
cutting-edge of technological development today.
Book Structure Chapter 1 starts with a refresher on first year undergraduate processor design material. It illustrates the principle of abstraction in hardware design by reviewing the
roles of logic and gate-level representations. It then introduces the important concept of the Reduced Instruction Set Computer (RISC) as background for what follows, and closes with some comments on design for low power.
Chapter 2 describes the ARM processor architecture in terms of the concepts introduced in the previous chapter, and Chapter 3 is a gentle introduction to user-level
assembly language programming and could be used in first year undergraduate teaching for this purpose.
Chapter 4 describes the organization and implementation of the 3- and 5-stage
pipeline ARM processor cores at a level suitable for second year undergraduate teaching, and covers some implementation issues.
Chapters 5 and 6 go into the ARM instruction set architecture in increasing depth.
Chapter 5 goes back over the instruction set in more detail than was presented in
Chapter 3, including the binary representation of each instruction, and it penetrates
more deeply into the comers of the instruction set. It is probably best read once and
then used for reference. Chapter 6 backs off a bit to consider what a high-level language (in this case, C) really needs and how those needs are met by the ARM instruction set. This chapter is based on second year undergraduate material.
Preface
V
Chapter 7 introduces the 'Thumb' instruction set which is an ARM innovation to
address the code density and power requirements of small embedded systems. It is of
peripheral interest to a generic study of computer science, but adds an interesting lateral perspective to a postgraduate course.
Chapter 8 raises the issues involved in debugging systems which use embedded
processor cores and in the production testing of board-level systems. These issues are
background to Chapter 9 which introduces a number of different ARM integer cores,
broadening the theme introduced in Chapter 4 to include cores with 'Thumb', debug
hardware, and more sophisticated pipeline operation.
Chapter 10 introduces the concept of memory hierarchy, discussing the principles
of memory management and caches. Chapter 11 reviews the requirements of a
modern operating system at a second year undergraduate level and describes the
approach adopted by the ARM to address these requirements. Chapter 12 introduces
the integrated ARM CPU cores (including StrongARM) that incorporate full support
for memory management.
Chapter 13 covers the issues of designing SoCs with embedded processor cores. Here,
the ARM is at the leading edge of technology. Several examples are presented of production embedded system chips to show the solutions that have been developed to the many
problems inherent in committing a complex application-specific system to silicon.
Chapter 14 moves away from mainstream ARM developments to describe the asynchronous ARM-compatible processors and systems developed at the University of
Manchester, England, during the 1990s. After a decade of research the AMULET
technology is, at the time of writing, about to take its first step into the commercial
domain. Chapter 14 concludes with a description of the DRACO SoC design, the first
commercial application of a 32-bit asynchronous microprocessor.
A short appendix presents the fundamentals of computer logic design and the terminology which is used in Chapter 1.
A glossary of the terms used in the book and a bibliography for further reading are
appended at the end of the book, followed by a detailed index.
Course
The chapters are at an appropriate level for use on undergraduate courses as follows:
relevance
Year 1: Chapter 1 (basic processor design); Chapter 3 (assembly language programming); Chapter 5 (instruction binaries and reference for assembly language
programming).
Year 2: Chapter 4 (simple pipeline processor design); Chapter 6 (architectural support for high-level languages); Chapters 10 and 11 (memory hierarchy and
architectural support for operating systems).